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'[EE]: serial LVDS to USB2.0, the simplest way'
2012\02\16@062742 by Vasile Surducan

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Hi all,

I need to interface an 120Msps serial ADC with LVDS output  to an USB2.0.
Does anyone knows a small ASIC, DSP or whatever which allows this simple task.
I thought also to USB to SATA bridge, however I need a few
programmable IOs for controlling the A2D,

thx,
Vasil

2012\02\16@064208 by Mike Harrison

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On Thu, 16 Feb 2012 13:27:42 +0200, you wrote:

>Hi all,
>
>I need to interface an 120Msps serial ADC with LVDS output  to an USB2.0.
>Does anyone knows a small ASIC, DSP or whatever which allows this simple task.
>I thought also to USB to SATA bridge, however I need a few
>programmable IOs for controlling the A2D,
>
>thx,
>Vasile

Classic application for a small FPGA, plus FTDI FTx232H hi-speed USB interface. FPGA will handle LVDS conversion, some RAM for buffering and handshaking.

2012\02\16@075101 by alan.b.pearce

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> >Hi all,
> >
> >I need to interface an 120Msps serial ADC with LVDS output  to an USB2.0..
> >Does anyone knows a small ASIC, DSP or whatever which allows this simple task.
> >I thought also to USB to SATA bridge, however I need a few programmable
> >IOs for controlling the A2D,
> >
> >thx,
> >Vasile
>
> Classic application for a small FPGA, plus FTDI FTx232H hi-speed USB interface.
> FPGA will handle LVDS conversion, some RAM for buffering and handshaking.

When you say LVDS, what format is it? Does it work just like an SPI device (LVDS really is only the differential hardware layer). If it does work like an SPI device then a Microchip 2210 USB-SPI with an LVDS driver and receiver chip may do what you want.


-- Scanned by iCritical.

2012\02\16@081029 by V G

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On Thu, Feb 16, 2012 at 6:41 AM, Mike Harrison <spam_OUTmikeTakeThisOuTspamwhitewing.co.uk> wrote:
>
> Classic application for a small FPGA, plus FTDI FTx232H hi-speed USB
> interface.
> FPGA will handle LVDS conversion, some RAM for buffering and handshaking.


I agree. I would definitely go this route for such an application

2012\02\16@081921 by Vasile Surducan

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On Thu, Feb 16, 2012 at 2:50 PM,  <.....alan.b.pearceKILLspamspam@spam@stfc.ac.uk> wrote:
>> >Hi all,
>> >
>> >I need to interface an 120Msps serial ADC with LVDS output  to an USB2.0.
>> >Does anyone knows a small ASIC, DSP or whatever which allows this simple task.
>> >I thought also to USB to SATA bridge, however I need a few programmable
>> >IOs for controlling the A2D,
>> >
>> >thx,
>> >Vasile
>>
>> Classic application for a small FPGA, plus FTDI FTx232H hi-speed USB interface.
>> FPGA will handle LVDS conversion, some RAM for buffering and handshaking..
>
> When you say LVDS, what format is it? Does it work just like an SPI device (LVDS really is only the differential hardware layer). If it does work like an SPI device then a Microchip 2210 USB-SPI with an LVDS driver and receiver chip may do what you want.

It's 14 bit serial output in one lane (one bit a time) or two lane
(two bits at a time) and frame, all LVDS output.
Also has a SPI for commands. See for example LTC2268.

thx,
Vasile

2012\02\16@082509 by Mike Harrison
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On Thu, 16 Feb 2012 08:10:14 -0500, you wrote:

>On Thu, Feb 16, 2012 at 6:41 AM, Mike Harrison <mikespamKILLspamwhitewing.co.uk> wrote:
>>
>> Classic application for a small FPGA, plus FTDI FTx232H hi-speed USB
>> interface.
>> FPGA will handle LVDS conversion, some RAM for buffering and handshaking..
>
>
>I agree. I would definitely go this route for such an application.

BTW there are a couple of FPGA modules with the FTDI HS USB chip on :
http://www.ftdichip.com/Support/Documents/DataSheets/Modules/DS_Morph-IC-II..pdf

http://www.ftdichip.com/Support/Documents/DataSheets/DLP/dlp-hs-fpga-ds-v14..pdf

2012\02\16@101552 by Dave Tweed

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Vasile Surducan wrote:
{Quote hidden}

Clearly, this is anything but a "simple task". Given that high-speed USB can
only support about 40 MBps sustained, you'd only be able to operate this chip
at 20 Msps or so with a "bare-bones" interface. If you want to burst data at
higher sample rates, you're going to need a significant amount of high-speed
buffer memory between the ADC and the USB.

Just as an example, look at Linear's DC1371A board, which performs the
function you are asking for. It includes a rather hefty Virtex-5 FPGA along
with a couple of high-speed ZBT SRAMs. Granted, this board supports many more
features than you probably need, but the basic data handling is going to be
very similar.

You're going to have to give us a better idea of what you're trying to do with
this chip before we can offer meaningful suggestions. BTW, this is exactly the
sort of FPGA design work that I do. If you'd like to discuss this project
off-list, send a message to dtweed at dtweed dot com.

-- Dav

2012\02\16@130731 by Vasile Surducan

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On Thu, Feb 16, 2012 at 5:15 PM, Dave Tweed <EraseMEpicspam_OUTspamTakeThisOuTdtweed.com> wrote:
{Quote hidden}

Thx Dave,
I know quite well Virtex5, I've designed one project with, but now is
not applicable because of space and power constraint. In fact Virtex5
is good only if an ASIC is finally implemented, which is not the case.
I think the price of Virtex5 does not recommend it for such
application. So, USB2.0 can only 40Mbps?

Vasile

2012\02\16@131355 by Vasile Surducan

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On Thu, Feb 16, 2012 at 8:07 PM, Vasile Surducan <@spam@piclist9KILLspamspamgmail.com> wrote:
{Quote hidden}

OK, 40MBps, that's correct.

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